View SC2602LSTRT_4123650.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Synchronous Voltage Mode Controller for Distributed Power Supply
POWER MANAGEMENT Description
The SC2602L is low-cost, full featured, synchronous voltage-mode controller designed for use in single ended power supply applications where efficiency is of primary concern. Synchronous operation allows for the elimination of heat sinks in many applications. The SC2602L is ideal for implementing DC/DC converters needed to power advanced microprocessors in low cost systems, or in distributed power applications where efficiency is important. Internal level-shift, high-side drive circuitry, and preset shoot-through control, allows the use of inexpensive N-channel power MOSFETs. SC2602L features include temperature compensated voltage reference, triangle wave oscillator and current sense comparator circuitry. Power good signaling, shutdown, and over voltage protection are also provided. The SC2602L operates at a fixed 200kHz which is for optimum compromise between efficiency, external component size, and cost. Two SC2602L can be used together to sequence two voltage regulators for power up in telecom systems. The power good of the first SC2602L connected to the enable of the second SC2602L makes this possible.
SC2602L
Features
Synchronous operation for high efficiency (95%) R DS(ON) current sensing Output voltage can be programmed as low as 0.8V On-chip power good and OVP functions Small size with minimum external components Soft Start Enable function SO-14 package is fully WEEE and RoHS compliant
Applications
Microprocessor core supply Low cost synchronous applications Voltage Regulator Modules (VRM) DDR termination supplies Networking power supplies Sequenced power supplies
Typical Application Circuit
V_pullup
5V IN
R1 R3 C1 C3 U1 C5 C6 1 2 PWRGD R4 OVP 3 4 5 6 D1 7 VCC GND 14 13 12 11 10 9 C8 8 Q2 R6 + C10 R7 R8 C9 R5 C7 Q1 12V IN L1 C4 SS/SHDN R2 + C2
GND
PWRGD SS/SHDN OVP OCSET PHASE DH PGND SC2602L COMP SENSE BSTH BSTL DL
2.5V OUT
GND
Figure 1. Typical distributed power supply
Revision: January 05, 2006 1 www.semtech.com
SC2602L
POWER MANAGEMENT Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Exposure to Absolute Maximum rated conditions for extended periods of time may affect device reliability.
Parameter VCC, BST L to GND PGND to GND PHASE to GND(1) BST H to PHASE T hermal Resistance Junction to Case T hermal Resistance Junction to Ambient Operating T emperature Range Maximum Junction T emperature Storage T emperature Range Lead T emperature (Soldering) 10 Sec. ESD Rating (Human Body Model)
Note: (1) -1.5V to 20V for 25ns repetitive every cycle.
Symbol VIN
Maximum -1.0 to 16 (20V Surge) 0.5 -0.5 to 18 (20V Surge) 16 (20V Surge)
Units V V V V C/W C/W C C C C kV
JC J A T T T T
A
45 115 -40 to +85 125 -65 to +150 300 2
J
ST G
LE A D
ESD
Electrical Characteristics
Unless specified: VCC = 4.75V to 12.6V; GND = PGND = 0V; VBSTL = 12V; VBSTH-PHASE = 12V; TJ = 25oC
Parameter Pow er Supply Supply Voltage Supply C urrent Li ne Regulati on Error Amplifier T ransconductance Gai n (AOL) Input Bi as Oscillator Osci llator Frequency Osci llator Max D uty C ycle Internal Ramp Peak to Peak MOSFET D rivers D H Source/Si nk D L Source/Si nk
2005 Semtech Corp.
C onditions
Min
Typ
Max
U nits
V CC E N = V CC VO = 2.5V
4.2 6 0.5
12.6 10
V mA %
G
m
1.8 50 5 8
mS dB A
200 90 95 1
kHz % V
BST H - D H = 4.5V, D H - PHASE = 2V BST L - D L = 4.5V. D L - PGND . = 2V
2
1 1
A A
www.semtech.com
SC2602L
POWER MANAGEMENT Electrical Characteristics (Cont.)
Unless specified: VCC = 4.75V to 12.6V; GND = PGND = 0V; VBSTL = 12V; VBSTH-PHASE = 12V; TJ = 25oC
Parameter PR OTEC TION OVP T hreshold Voltage OVP Source C urrent Power Good T hreshold D ead T i me Over C urrent Set (Isi nk) R eference Reference Voltage Soft Start C harge C urrent D i scharge C urrent Pow er Good Si nk C urrent C apabi li ty S hut D ow n Shut D own T hreshold
C onditions
Min
Typ
Max
U nits
20 VOVP = 3V 10 88 45 2.0V < VOCSET < 12V 180 200 112 100 220
% mA % nS A
0OC to 70OC
0.792
0.8
0.808
V
VSS = 1.5V VSS = 1.5V
8.0
10 1.5
12
A A
Si nk 1mA
0.4
V
0.6
V
Note: (1) Specification refers to application circuit (Figure 1).
2005 Semtech Corp.
3
www.semtech.com
SC2602L
POWER MANAGEMENT Pin Configuration
Top View
Ordering Information
Device(2) Frequency 200kHz Package(1) SO-14
VCC PWRGD OVP OCSET PHASE DH PGND
(14-Pin SOIC)
GND SS / SHDN COMP SENSE BSTH BSTL DL
SC2602LST RT S C 2602LE V B
Evaluation Board
Notes:
(1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant.
Pin Descriptions
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Pin Name VC C PWRGD OVP OCSET PHASE DH PGND DL BST L BST H SENSE COMP SS/SHDN GND Chip supply voltage. Open collector output. Logic high indicates correct ouput voltage. Over voltage protection output. Source at least 10mA when Vsense > 1.2 * VBG. Set the converter over current trip point. Input from the phase node between the MOSFET s. High side driver output. Power ground. Low side driver output. Bootstrap, low side driver. Bootstrap, high side driver. Voltage sense input. Compensation pin. Gate Drive return Ground for the 1.5V GMCH regulator. Connect to Source of bottom FET . Signal ground. Pin Function
Note: (1) All logic level inputs and outputs are open collector TTL compatible.
2005 Semtech Corp.
4
www.semtech.com
SC2602L
POWER MANAGEMENT Block Diagram
VCC
Vbg Over Current 200uA Under Voltage
+10% PWRGD -10% 0.8V +20%
VCC
OCSET
Oscillator
One Shot
OVP SENSE
Vbg
Error Amp PWM DRVH
BSTH DH
COMP
S 0.8V R 10uA QB Fault 1.5uA 0.6V DRVL
VCC
Cross Current Control
PHASE BSTL DL PGND
SS/SHDN GND
Theory of Operation
Synchronous Buck Converter The output rail is regulated by a synchronous, voltagemode pulse width modulated (PWM) controller. This section has all the features required to build a high efficiency synchronous buck converter, including "Power Good" flag, shut-down, and cycle-by-cycle current limit. The output voltage of the synchronous converter is set and controlled by the output of the error amplifier. The external resistive divider reference voltage is derived from an internal trimmed-bandgap voltage reference (See Fig. 1). The inverting input of the error amplifier receives its voltage from the SENSE pin. The internal oscillator uses an on-chip capacitor and trimmed precision current sources to set the oscillation frequency to 200kHz. The triangular output of the oscillator sets the reference voltage at the inverting input of the comparator. The non-inverting input of the comparator receives it's input voltage from the error amplifier. When the oscillator output voltage drops below the error amplifier output voltage, the comparator output goes high. This pulls DL low, turning off the low-side FET, and DH is pulled high, turning on the high-side FET (once the cross-current control allows it). When the oscillator voltage rises back above the error amplifier output voltage, the comparator output goes low. This pulls DH low, turning off the high-side FET, and DL is pulled high, turning on the low-side FET (once the cross-current control allows it).
2005 Semtech Corp. 5
As SENSE increases, the output voltage of the error amplifier decreases. This causes a reduction in the ontime of the high-side MOSFET connected to DH, hence lowering the output voltage. Under Voltage Lockout The under voltage lockout circuit of the SC2602L assures that the high-side MOSFET driver outputs remain in the off state whenever the supply voltage drops below set parameters. Lockout occurs if VCC falls below 4.1V. Normal operation resumes once VCC rises above 4.2V. Over-Voltage Protection The over-voltage protection pin (OVP) is high only when the voltage at SENSE is 20% higher than the target value programmed by the external resistor divider. The OVP pin is internally connected to a PNP's collector. Power Good The power good function is to confirm that the regulator outputs are within +/-10% of the programmed level. PWRGD remains high as long as this condition is met. PWRGD is connected to an internal open collector NPN transistor.
www.semtech.com
SC2602L
POWER MANAGEMENT Applications Information (Cont.)
Soft Start Initially, SS/SHDN sources 10A of current to charge an external capacitor. The outputs of the error amplifiers are clamped to a voltage proportional to the voltage on SS/SHDN. This limits the on-time of the high-side MOSFETs, thus leading to a controlled ramp-up of the output voltages. R DS(ON) Current Limiting The current limit threshold is set by connecting an external resistor from the VCC supply to OCSET. The voltage drop across this resistor is due to the 200A internal sink sets the voltage at the pin. This voltage is compared to the voltage at the PHASE node. This comparison is made only when the high-side drive is high to avoid false current limit triggering due to uncontributing measurements from the MOSFETs off-voltage. When the voltage at PHASE is less than the voltage at OCSET, an overcurrent condition occurs and the soft start cycle is initiated. The synchronous switch turns off and SS/ SHDN starts to sink 1.5A. When SS/SHDN reaches 0.8V, it then starts to source 10A and a new cycle begins. Hiccup Mode During power up, the SS/SHDN pin is internally pulled low until VCC reaches the undervoltage lockout level of 4.2V. Once VCC has reached 4.2V, the SS/SHDN pin is released and begins to source 10A of current to the external soft-start capacitor. As the soft-start voltage rises, the output of the internal error amplifier is clamped to this voltage. When the error signal reaches the level of the internal triangular oscillator, which swings from 1V to 2V at a fixed frequency of 200kHz, switching occurs. As the error signal crosses over the oscillator signal, the duty cycle of the PWM signal continues to increase until the output comes into regulation. If an overcurrent condition has not occurred the soft-start voltage will continue to rise and level off at about 2.2V. An over-current condition occurs when the high-side drive is turned on, but the PHASE node does not reach the voltage level set at the OCSET pin. The PHASE node is sampled only once per cycle during the valley of the triangular oscillator. Once an over-current occurs, the highside drive is turned off and the low-side drive turns on and the SS/SHDN pin begins to sink 1.5A. The softstart voltage will begin to decrease as the 1.5A of current discharges the external capacitor. When the softstart voltage reaches 0.8V, the SS/SHDN pin will begin to source 10A and begin to charge the external capacitor causing the soft-start voltage to rise again. Again, when the soft-start voltage reaches the level of the internal oscillator, switching will occur. If the over-current condition is no longer present, normal operation will continue. If the over-current condition is still present, the SS/SHDN pin will again begin to sink 1.5A. This cycle will continue indefinitely until the overcurrent condition is removed. In conclusion, below is shown a typical "12V Application Circuit" which has a BSTH voltage derived by bootstrapping input voltage to the PHASE node through diode D1. This circuit is very useful in cases where only input power of 12V is available. In order to prevent substrate glitching, a small-signal diode should be placed in close proximity to the chip with cathode connected to PHASE and anode connected to PGND.
2005 Semtech Corp.
6
www.semtech.com
SC2602L
POWER MANAGEMENT Application Circuit
Typical 12V Application Circuit with Bootstrapped BSTH
+5V
R2 R1 1.74K 5K
C1 0.1u
R3 C2 10 1.0u C5 D1 1N1418 C4 10u + C3 820u/16V
12V IN
C6 PWRGD 0.1u
C7 1.0u 1 2 3 VCC
U1
GND 14 13
0.1u SS/SHDN C8 1.0u R5 12 11 10 9 Q2 8 9.6K 36n Q1 L1 4uH C9
GND
PWRGD SS/SHDN OVP OCSET PHASE DH PGND COMP SENSE BSTH BSTL DL
R4 1K OVP
4 5 6 D2 7 1N4148
R6 C11 10u R7
3.3V OUT
+ C10 1200u/6.3V
SC2602L
R8
2.2
GND
2005 Semtech Corp.
7
www.semtech.com
SC2602L
POWER MANAGEMENT Typical Characteristics
Output Ripple Voltage Ch1: Vo_rpl 1. VIN = 5V; VO = 3.3V; IOUT = 12A Gate Drive Waveforms Ch1: Top FET Ch2: Bottom FET
PIN Descriptions
Ch1: Vo_rpl 2. VIN = 5V; VOUT = 1.3V; IOUT = 12A
Ch1: op FET T Ch2: Bottom FET
2005 Semtech Corp.
8
www.semtech.com
SC2602L
POWER MANAGEMENT Typical Characteristics (Cont.)
Ch1: Vo_rpl 2. VIN = 5V; VOUT = 1.3V; IOUT = 12A Ch1: Top FET Ch2: Bottom FET
2005 Semtech Corp.
9
www.semtech.com
SC2602L
POWER MANAGEMENT Typical Characteristics (Cont.)
Hiccup Mode
Ch1: Ch2: Ch3: Ch4:
Vin Vss Top Gate Vout
Vin = 5V Vout = 3.3V Vbst = 12V Iout = S.C.
Start Up Mode
Ch1: Vin Ch2: Vss Ch3: Top Gate Ch4: Vout Vin = 5V Vout = 3.3V Iout = 2A Vbst = 12V
2005 Semtech Corp.
10
www.semtech.com
SC2602L
POWER MANAGEMENT
Gpwm L EA R1 R Vbg 1.25Vdc 0.5Vdc 0.8Vdc Vin C Co Rc Ro R2
The task here is to properly choose the compensation network for a nicely shaped loop-gain Bode plot. The following design procedures are recommended to accomplish the goal: (1) Calculate the corner frequency of the output filter:
F o := 1 2 L C o
Fig. 2. SC2602L small signal model.
The control model of SC2602L control loop small signal can be depicted in Fig. 2. This model can also be used in SPICE kind of simulator to generate loop gain Bode plots. The bandgap reference is 0.8V and trimmed to +/-1% accuracy. The desired output voltage can be achieved by setting the resistive divider network, R1 and R2. The error amplifier is transconductance type with fixed gain of:
1.8. mA V
(2) Calculate the ESR zero frequency of the output filter capacitor:
F esr := 1 2 R c C o
(3) Check that the ESR zero frequency is not too high.
F esr < F sw 5
Gm
The compensation network includes a resistor and a capacitor in series, which terminates from the output of the error amplifier to the ground. This device uses voltage mode control with input voltage feed forward. The peak-to-peak ramp voltage is proportional to the input voltage, which results in an excellent performance to reject input voltage variation. The PWM gain is inversion of the ramp amplitude, and this gain is given by:
G pwm 1 V ramp
If this condition is not met, the compensation structure may not provide loop stability. The solution is to add some electrolytic capacitors to the output capacitor bank to correct the output filter corner frequency and the ESR zero frequency. In some cases, the filter inductance may also need to be adjusted to shift the filter corner frequency. It is not recommended to use only high frequency multi-layer ceramic capacitors for output filter. (4) Choose the loop gain cross over frequency (0 dB frequency). It is recommended that the crossover frequency is always less than one fifth of the switching frequency : F
F x_over
sw
5
where the ramp amplitude (peak-to-peak) is 1.0 volts when input voltage is 12 volts. The total control loop-gain can then be derived as follows:
T( s) T o. 1 s. R. C . s. R. C 1 s. R c . C o 1 s. R c . C o L Ro
2 s . L. C o. 1
If the transient specification is not stringent, it is better to choose a crossover frequency that is less than one tenth of the switching frequency for good noise immunity. The resistor in the compensation network can then be calculated as:
F esr F x_over V o R := G pwm V in G m F o F esr V bg
1
2
Rc Ro
when
F o < F esr < F x_over
V bg T o := G m G pwm V in R Vo
2005 Semtech Corp. 11
www.semtech.com
SC2602L
POWER MANAGEMENT Applications Information (Cont.)
or
R := 1 G pwm V in G m
Step 1. Output filter corner frequency
F o = 2.516 KHz
F o F x_over V o F esr F o V bg
2
Step 2. ESR zero frequency:
F esr = 7.958 KHz
when
F esr < F o < F x_over
Step 3. Check the following condition:
F esr < F sw 5
(5) The compensation capacitor is determined by choosing the compensator zero to be about one fifth of the output filter corner frequency:
F zero C Fo 5
Which is satisfied in this case. Step 4. Choose crossover frequency and calculate compensator R:
zero
1 ..R .F 2
F x_over = 20 KHz
(6) The final step is to generate the Bode plot, either by using the simulation model in Fig. 2 or using the equations provided here with Mathcad. The phase margin can then be checked using the Bode plot. Usually, this design procedure ensures a healthy phase margin. (7) An additional capacitor should be reserved at the compensation pin to ground to have another high frequency pole. An example is given below to demonstrate the procedure introduced above. The parameters of the power supply are given as : The parameters of the power supply are given as :
V in Vo Io F sw
L Co Rc V bg V ramp Gm
2005 Semtech Corp.
R = 4.8 K
Step 5. Calculate the compensator C:
C = 65.886 nF
Step 6. Generate Bode plot and check the phase margin. In this case, the phase margin is about 85oC that ensures the loop stability.
12. V 3.3. V 12. A 200. KHz
4 . H 1200. F 0.02. 0.8. V 1 .V
1.8. mA V
12 www.semtech.com
SC2602L
POWER MANAGEMENT Applications Information (Cont.)
Loop Gain Mag (dB)
100
mag( i )
50
0
50 0.01
0.1
1 F i
10
100
3 1 .10
kHz
Loop Gain Phase (Degree)
0 45 phase( i ) 90 135 180 0.01 1 .10 3
0.1
1 F i
10
100
kHz
Bode plot of the control loop
2005 Semtech Corp.
13
www.semtech.com
SC2602L
POWER MANAGEMENT Outline Drawing - S0-14
A e N
2X
D
DIM
A A1 A2 b c D E1 E e h L L1 N 01 aaa bbb ccc
DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX
.053 .069 .004 .010 .049 .065 .012 .020 .007 .010 .337 .341 .344 .150 .154 .157 .236 BSC .050 BSC .010 .020 .016 .028 .041 (.041) 14 0 8 .004 .010 .008 1.35 1.75 0.10 0.25 1.25 1.65 0.31 0.51 0.17 0.25 8.55 8.65 8.75 3.80 3.90 4.00 6.00 BSC 1.27 BSC 0.25 0.50 0.40 0.72 1.04 (1.04) 14 0 8 0.10 0.25 0.20
E/2 E1 E
ccc C 2X N/2 TIPS
1
2
3 B
D aaa C A2 A SEATING PLANE C bxN bbb A1 C A-B D
h h H GAGE PLANE 0.25 L (L1) DETAIL c
01
SEE DETAIL SIDE VIEW
NOTES: 1.
A
A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-
2. DATUMS
3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MS-012, VARIATION AB.
Land Pattern - S0-14
X
DIM
(C) G Z C G P X Y Z
DIMENSIONS INCHES MILLIMETERS
(.205) .118 .050 .024 .087 .291 (5.20) 3.00 1.27 0.60 2.20 7.40
Y P
NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2. REFERENCE IPC-SM-782A, RLP NO. 302A.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804
2005 Semtech Corp.
14
www.semtech.com

▲Up To Search▲

Price & Availability of SC2602LSTRT

	To Download SC2602LSTRT Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .